BeRadio Software Defined Radio Success Story

PROBLEM: There is no low-cost entry-level FPGA-based SDR hardware for getting started in Digital Down Conversion (DDC) receiver design. Simple, low-cost FPGA development kits exist, and hardware is available for NIOS® II soft processor (BeMicroSDK), motor control (BeInMotion) and USB 3.0 (BeUSB 3.0). A logical extension is BeRadio.

SOLUTION: Develop a very basic RF board that can be used in conjunction with BeMicroSDK to form a complete DDC receiver. The board has a 12-bit ADC running at 10MHz, an on-board MW antenna circuit and an audio DAC for headphone audio output. A stand-alone MW AM broadcast receiver is implemented in the FPGA, and tuning is accomplished with push buttons on the BeMicroSDK or optionally via USB using a supplied BeRadio control program for the PC. The FPGA code is open source and uses no licensed IP.

RESULTS: Arrow Electronics conducted introductory SDR seminars worldwide using the BeRadio hardware. BeRadio was inexpensive enough that it was included in the seminar at no cost. The BeRadio project was the foundation for the SDRstickTM series of radio that Zephyr now offers. The UDPSDR-HF1 is a direct descendant of BeRadio, and offers greatly improved performance (14-bit, 80 Msps ADC) at a slightly higher price.


This is the BeMicroSDK, the inspiration for BeRadio. It can be used by itself to develop Altera NIOS® II embedded CPU systems, or in conjunction with BeInMotion, BeUSB 3.0 or BeRadio boards for motor control, USB 3.0 or SDR applications, respectively.


The BeRadio board contains all of the RF components (plus and ADC and DAC) to make a complete, stand-alone MW receiver when coupled to a BeMicroSDK.


This block diagram shows how the MW SDR is implemented. The aqua (inner box) background shows the FPGA content, the purple (middle box) background shows additional BeMicroSDK hardware, while the yellow (outer box) background shows the BeRadio board hardware.


The BeMicroCVA9 board is a much more capable replacement for the BeMicroSDK in SDR designs. With its large Cyclone V E FPGA (301K LEs) and Gigabit Ethernet port, the SDR possibilities are many.